HRS14 

         HRS14 - Host Signal Enable
Module Instance Base Address Register Address
i_sdmmc__sdmmc_apb_slv__10808000____HRS____SEG_L4_MP_sdmmc_s_0x0_0x1000 0x10808000 0x10808038

Size: 32

Offset: 0x38

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_4

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved_4

RO 0x0

PHYDATOF_IE

RW 0x0

PHYDATUR_IE

RW 0x0

PHYCMDOF_IE

RW 0x0

PHYCMDUR_IE

RW 0x0

HRS14 Fields

Bit Name Description Access Reset
31:4 Reserved_4 
Reserved bitfield added by Magillem
 RO 0x0
3 PHYDATOF_IE 
              Interrupt enable for PHYDATOF status\n
              [list] [*] 1 - enabled [*] 0 - masked [/list]
RW 0x0
2 PHYDATUR_IE 
              Interrupt enable for PHYDATUR status\n
              [list] [*] 1 - enabled [*] 0 - masked [/list]
RW 0x0
1 PHYCMDOF_IE 
              Interrupt enable for PHYCMDOF status\n
              [list] [*] 1 - enabled [*] 0 - masked [/list]
RW 0x0
0 PHYCMDUR_IE 
              Interrupt enable for PHYCMDUR status\n
              [list] [*] 1 - enabled [*] 0 - masked [/list]
RW 0x0