HRS06

         HRS06 - eMMC control registers
      
Module Instance Base Address Register Address
i_sdmmc__sdmmc_apb_slv__10808000____HRS____SEG_L4_MP_sdmmc_s_0x0_0x1000 0x10808000 0x10808018

Size: 32

Offset: 0x18

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_1

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved_1

RO 0x0

EMM

RW 0x0

HRS06 Fields

Bit Name Description Access Reset
31:3 Reserved_1
Reserved bitfield added by Magillem
RO 0x0
2:0 EMM
              EMM - eMMC Mode select\n
              This field sets eMMC mode. The mode should reflect to the eMMC device setting.
              If the SD card is in use, this field needs to be 000b.\n
              [list] [*] 000b - SD Card in use [*] 010b - SDR [*] 011b - DDR [*] 100b - HS200 [*] 101b - HS400 [*] 110b - HS400 Enhanced Strobe [*] others - Legacy [/list]
            
RW 0x0