General-Purpose I/O User Guide: Agilex™ 3 FPGAs and SoCs

ID 847266
Date 8/04/2025
Public

Visible to Intel only — GUID: uvz1572938299300

Ixiasoft

Document Table of Contents

2.5.8. Simultaneous Switching Noise

Considering simultaneous switching noise (SSN) impact on the design, use differential I/O standards and lower voltage I/O standards for high-switching I/O pins. Place clock signals, RZQ pins, and asynchronous control signals near ground signals and away from large switching buses.