Cyclone® V SoC Development Kit User Guide

ID 830285
Date 10/07/2024
Public
Document Table of Contents

5.3.5. The DDR3 Tab

The DDR3 tab allows you to read and write the DDR3 memory on your board.
Figure 12. The DDR3 Tab

The following sections describe the controls on the DDR3 tab.

Start

The Start control initiates DDR3 memory transaction performance analysis.

Stop

The Stop control terminates transaction performance analysis.

Performance Indicators

These controls display current transaction performance analysis information collected since you last clicked Start:

  • Write, Read, and Total performance bars: Show the percentage of maximum theoretical data rate that the requested transactions are able to achieve.
  • Write (MBps), Read (MBps), and Total (MBps): Show the number of bytes of data analyzed per second. The data bus is 72 bits wide and the frequency is 400 MHz double data rate (800 Mbps per pin), equating to a theoretical maximum bandwidth of 3200 Megabits per second or 400 MBps.

Error Control

The Error control control displays data errors detected during analysis and allows you to insert errors:

  • Detected errors: Displays the number of data errors detected in the hardware.
  • Inserted errors: Displays the number of errors inserted into the transaction stream.
  • Insert Error: Inserts a one-word error into the transaction stream each time you click the button. Insert Error is only enabled during transaction performance analysis.
  • Clear: Resets the Detected errors and Inserted errors counters to zeros.

Number of Addresses to Write and Read

The Number of addresses to write and read control determines the number of addresses to use in each iteration of reads and writes.