Device Configuration User Guide: Agilex™ 5 FPGAs and SoCs

ID 813773
Date 4/01/2024
Public

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2.5.1. SDM Pin Mapping

You can use SDM I/O pins for configuration and other functions such as power management and SEU detection. You specify SDM I/O pin functions using the Assignments > Device > Device and Pin Options dialog box in the Quartus® Prime software.

Fixed SDM I/O Pin Assignments for Avalon® -ST x8 and AS x4

The Avalon® -ST x8 and AS x4 configuration schemes use the dedicated SDM I/O pin assignments listed in in the table below. Use the assignments in this table for MSEL and AVSTx8_DATA0 to AVSTx8_DATA8 and AS x4.

Table 6.  SDM Pin Mapping for Avalon® -ST x8 and AS x4
SDM Pins MSEL Function Configuration Source Function
Avalon® -ST x8 AS x4
SDM_IO0
SDM_IO1 AVSTx8_DATA2 AS_DATA1
SDM_IO2 AVSTx8_DATA0 AS_CLK
SDM_IO3 AVSTx8_DATA3 AS_DATA2
SDM_IO4 AVSTx8_DATA1 AS_DATA0
SDM_IO5 MSEL0 AS_nCSOO
SDM_IO6 AVSTx8_DATA4 AS_DATA3
SDM_IO7 MSEL1 AS_nCSO2
SDM_IO8

AVSTx8_READY

AS_nCSO3
SDM_IO9 MSEL2 AS_nCSO1
SDM_IO10 AVSTx8_DATA7
SDM_IO11 AVSTx8_VALID
SDM_IO12
SDM_IO13 AVSTx8_DATA5
SDM_IO14 AVSTx8_CLK
SDM_IO15 AVSTx8_DATA6 AS_nRST
SDM_IO16