MACsec Intel® FPGA System Design User Guide

ID 767516
Date 3/31/2024
Public
Document Table of Contents

6.5.1.1.1. GLOBAL Reset

The functionality supported in reset is listed below:
  • The MACsec IP is reset through the subsystem_cold_rst_n assertion/deassertion. There are 2 additional resets, app_ip_lite_areset_n and app_ip_st_areset_n, which can be triggered to reset the CSR block and the remaining logic blocks respectively. A programmable counter counts down upon the subsystem_cold_rst_n assertion/deassertion and assert/deassert subsystem_cold_rst_ack_n when the counter = 0.