AN 988: Using the Board-Aware Flow: in the Intel® Quartus® Prime Pro Edition Software

ID 757339
Date 1/09/2023

2.4. Using the Board-Aware Flow in Platform Designer

The board-aware flow is fully integrated within the Platform Designer GUI to simplify and accelerate the process of appropriately configuring IP and systems for a target board.

Platform Designer allows you to create a system that targets a specific development board, rather than only targeting a specific FPGA device. When you target a specific development board, Platform Designer is aware of the target board (board-aware) which simplifies the IP parameterization, pin assignments, and export of interfaces for the system.

The board-aware flow uses IP presets together with a board definition file that specifies the details of a target board. You can use (and reuse) the board definition and IP presets to automatically include the appropriate IP pin assignments, parameters, and exported interfaces for the target development board during system generation.

The following example board-aware flow example creates an LED system based on the PIO Intel® FPGA IP design example:

Figure 8. PIO IP-Based LED Design Block Diagram