Nios® V Processor Software Developer Handbook

ID 743810
Date 10/06/2025
Public
Document Table of Contents

7.7.6. Altera® FPGA Logging Functions

The Altera® FPGA logging functions provide a separate channel for sending logging and debugging information to a character-mode device, supplementing stdout and stderr. The Altera® FPGA logging information can be printed in response to several conditions. Altera® FPGA logging can be enabled and disabled independently of any normal stdio output, making it a powerful debugging tool.

When Altera® FPGA logging is enabled, your software can print extra messages to a specified port with HAL function calls. The logging port, specified in the BSP, can be a UART or a JTAG UART device. In its default configuration, Altera® FPGA logging prints out boot messages, which trace each step of the boot process.

Note: Avoid setting the Altera® FPGA logging device to the device used for stdout or stderr. If Altera® FPGA logging output is sent to stdout or stderr, the logging output might appear interleaved with the stdout or stderr output

Several logging options are available, controlled by C preprocessor symbols. You can also choose to add custom logging messages.

Altera® FPGA logging changes system behavior. The logging implementation is designed to be as simple as possible, loading characters directly to the transmit register. It can have a negative impact on software performance.

Altera® FPGA logging functions are conditionally compiled. When logging is disabled, it has no impact on code footprint or performance.

Note: The Altera® FPGA reduced device drivers do not support Altera® FPGA logging.