Nios® V Processor Software Developer Handbook

ID 743810
Date 10/06/2025
Public
Document Table of Contents

7.7.6.6. Altera® FPGA Logging Files

Table 28.  HAL Implementation Files for Altera® FPGA Logging
Location File Name
soft_processor/altera_hal2/HAL/inc/sys/ alt_log_printf.h
soft_processor/altera_hal2/HAL/src/ alt_log_printf.c
soft_processor/intel_niosv_m/HAL/src/ alt_log_macro.S
Note: All file locations are relative to <Intel Quartus Prime installation directory>/ip/altera folder.

These files implement the logging options listed in the Altera® FPGA Logging Options and Option Modifiers table. They also serve as examples of logging usage.

Table 29.  HAL Example Files for Altera® FPGA Logging
Location File Name
sopc_builder_ip/altera_avalon_jtag_uart/HAL/src/ altera_avalon_jtag_uart.c
sopc_builder_ip/altera_avalon_timer/HAL/src/ altera_avalon_timer_sc.c
soft_processor/altera_hal2/HAL/src/ alt_exit.c
soft_processor/altera_hal2/HAL/src/ alt_main.c
soft_processor/altera_hal2/HAL/src/ alt_write.c
soft_processor/intel_niosv_m/HAL/src/ crt0.S
Note: All file locations are relative to <Intel Quartus Prime installation directory>/ip/altera folder.