Nios® V Processor Software Developer Handbook

ID 743810
Date 10/06/2025
Public
Document Table of Contents

9.2.1. CLINT-Direct Mode

All traps (both exceptions and interrupts) are dispatched through a single top-level trap handler. In other words, all traps are handled by code residing at a single location - the exception vector.
When the Nios® V processor is under CLINT-Direct mode, it implements a simple, non-vectored interrupt controller. Upon receiving a trap (interrupt or exception) request, the Nios® V processor performs the following steps:
  1. Jump to the exception vector, which is stored in mtvec CSR.
  2. Identify which trap is currently asserted. If it is an interrupt, mask other interrupts.
  3. Execute the trap handler at the exception vector.

To complement CLINT-Direct, the trap handler identifies the trap cause and dispatches the registered ISR. CLINT-Direct has 16 independent platform interrupt signals. These interrupt signals allow software to prioritize interrupts, with platform interrupt 0 as the highest priority.

Table 40.  Supported Traps
Type of Traps List of Traps
Interrupt
  • Machine software interrupt
  • Machine timer interrupt
  • 16 Platform interrupt
Exception
  • Instruction address misaligned
  • Instruction access fault
  • Illegal Instruction
  • Breakpoint
  • Load address misaligned
  • Load access fault
  • Store address misaligned
  • Store access fault
  • Hardware Error