Triple-Speed Ethernet Intel Agilex® 7 FPGA IP Design Example User Guide
ID
741330
Date
4/17/2023
Public
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1. Quick Start Guide
2. 10/100/1000 Multiport Ethernet MAC Design Example with 1000BASE-X/SGMII PCS and Embedded PMA
3. Triple-Speed Ethernet Intel Agilex® 7 FPGA IP Design Example User Guide Archive
4. Document Revision History for the Triple-Speed Ethernet Intel Agilex® 7 FPGA IP Design Example User Guide
3. Triple-Speed Ethernet Intel Agilex® 7 FPGA IP Design Example User Guide Archive
For the latest and previous versions of this user guide, refer to Triple-Speed Ethernet Intel Agilex 7 FPGA IP Design Example User Guide. If an IP or software version is not listed, the user guide for the previous IP or software version applies.
IP versions are the same as the Intel® Quartus® Prime Design Suite software versions up to v19.1. From Intel® Quartus® Prime Design Suite software version 19.2 or later, IP cores have a new IP versioning scheme.