MACsec Intel® FPGA IP User Guide

ID 736108
Date 12/19/2022

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Document Table of Contents Crypto TX Interface

This interface is only exposed when CRYPTO_QHIP_EN = 0. This setting is not recommended.

Note: For more information on how to use this interface, refer to Symmetric Cryptographic Intel FPGA Hard IP User Guide.
Table 14.  Crypto TX Interface
Signal Name Width Direction Description
app_ip_st_clk 1 Input Clock
app_ip_st_areset_n 1 Input Asynchronous reset
aes_ip_app_tx_tvalid 1 Output Valid
aes_ip_app_tx_tdata 512 Output Data
aes_app_ip_tx_tready 1 Input Ready
aes_ip_app_tx_tid 32 Output

Transaction Stream/Channel ID


Stream and Channel ID for Packet 0 (Both Single Packet Mode and Multi Packet Mode) and Packet 1 (Multi Packet Mode only)

  • TID[31:26] – Stream ID for packet 1
  • TID[25:16] – Channel ID for packet 1
  • TID[15:10] – Stream ID for packet 0
  • TID[9:0] – Channel ID for packet 0

Valid on every transfer of the packet

aes_ip_app_tx_tkeep 64 Output

1'b1 for data byte, 1'b0 for null byte

Note: This signal does not allow a null byte in the beginning or middle of the transfer. It is only applicable during the end of the transfer.
aes_ip_app_tx_tlast 1 Output Last, indicates end of transfer.
aes_ip_app_tx_tuser.algorithm_types 1 Output

Indicates AES or SM4 mode for the current clock cycle

  • 1: SM4
  • 0: AES
aes_ip_app_tx_tuser.encrypt_decrypt 1 Output

Indicates Encrypt or Decrypt mode for the current clock cycle

  • 1: decrypt
  • 0: encrypt
aes_ip_app_tx_tuser.key_128b_256b 1 Output

Indicates 128 bit key size or 256 bit key size mode for the current clock cycle

  • 0: 128 bit key size
  • 1: 256 bit key size
aes_ip_app_tx_tuser.pattern 4 Output

This is a 4-bit encoding for the Traffic Pattern types.

4'b 0010: MACsec

aes_ip_app_tx_tuser.mac_iv_tweak_en 1 Output Indicates the data fields carry an IV (or tweak for XTS) and at the output this field indicates the data contains the MAC.
aes_ip_app_tx_tuser.data_en 1 Output Field indicates that for a given pattern ID the data bits carry the raw data into the crypto cores
aes_ip_app_tx_tuser.key_en 1 Output Indicates the data carries the keys
aes_ip_app_tx_tuser.auth_tag 128 Output ICV field on decryption packet
aes_ip_app_tx_tuser.error_clear 1 Output When asserted the QHIP resets the internal error indicated by the profile ID and the channel ID associated with this clock to allow usage of this profile and channel again.
aes_ip_app_tx_tuser_last_segment<segment number> 1 Output

Packet segmentation boundary indication for higher bandwidth transfer.

  • aes_ip_app_tx_tuser_last_segment0
  • aes_ip_app_tx_tuser_last_segment1
  • aes_ip_app_tx_tuser_last_segment2
  • aes_ip_app_tx_tuser_last_segment3