F-Tile Dynamic Reconfiguration Design Example User Guide
ID
710582
Date
8/18/2025
Public
1. Quick Start Guide
2. Detailed Description for CPRI Multirate Design Example
3. Detailed Description for Ethernet Multirate Design Example
4. Detailed Description for Ethernet Multirate Design Example with Auto-Negotiation and Link Training Enabled
5. Detailed Description for PMA/FEC Direct PHY Multirate Design Example
6. Detailed Description for Ethernet to CPRI Design Example
7. Detailed Description for PMA/FEC Direct PHY Static IPs Design Implementation
8. F-Tile Dynamic Reconfiguration Design Example User Guide Archives
9. Document Revision History for the F-Tile Dynamic Reconfiguration Design Example User Guide
1.1. Hardware and Software Requirements
- Quartus® Prime Pro Edition software
- System console available with the Quartus® Prime Pro Edition software
- A supported simulator:
- Synopsys* VCS*
- Siemens* EDA QuestaSim*
- Cadence* Xcelium*
- For hardware testing:
- Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit DK-SI-AGI027FA (or)
- Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit DK-SI-AGI027FAB
- QSFP-DD/QSFP-DD800 loopback module3
3 For 400GE-4 FHT Ethernet Multirate Design Example, only QSFP-DD800 loopback module is supported.