F-Tile Dynamic Reconfiguration Design Example User Guide

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ID 710582
Date 4/03/2023
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Document Table of Contents
Document Table of Contents x
1. Quick Start Guide 2. Detailed Description for CPRI Multirate Design Example 3. Detailed Description for PMA/FEC Direct PHY Multirate Design Example 4. Detailed Description for Ethernet Multirate Design Example 5. Detailed Description for Ethernet to CPRI Design Example 6. F-Tile Dynamic Reconfiguration Design Example User Guide Archives 7. Document Revision History for F-Tile Dynamic Reconfiguration Design Example User Guide
1. Quick Start Guide x
1.1. Hardware and Software Requirements 1.2. Generating the Design 1.3. Directory Structure 1.4. Compiling the Compilation-Only Project 1.5. Simulating the Design Example Testbench 1.6. Compiling and Configuring the Design Example in Hardware 1.7. Testing the Hardware Design Example
1.2. Generating the Design x
1.2.1. CPRI Multirate Design Example Parameters 1.2.2. Ethernet Multirate Design Example Parameters 1.2.3. PMA/FEC Direct PHY Multirate Design Example Parameters 1.2.4. Ethernet to CPRI Design Example Parameters
2. Detailed Description for CPRI Multirate Design Example x
2.1. CPRI Multirate Design Example: Functional Description 2.2. CPRI Multirate Design Example: Registers
2.1. CPRI Multirate Design Example: Functional Description x
2.1.1. CPRI Multirate Design Example: Simulation Testbench 2.1.2. CPRI Multirate Hardware Design Example 2.1.3. CPRI Multirate Design Example: Reset Scheme
3. Detailed Description for PMA/FEC Direct PHY Multirate Design Example x
3.1. PMA/FEC Direct PHY Multirate Design Example: Functional Description 3.2. PMA/FEC Direct PHY Multirate Design Example: Registers
3.1. PMA/FEC Direct PHY Multirate Design Example: Functional Description x
3.1.1. PMA/FEC Direct PHY Multirate Design Example: Simulation Testbench 3.1.2. PMA/FEC Direct PHY Multirate Hardware Design Example
4. Detailed Description for Ethernet Multirate Design Example x
4.1. Ethernet Multirate Design Example: Functional Description 4.2. Ethernet Multirate Design Example: Registers
4.1. Ethernet Multirate Design Example: Functional Description x
4.1.1. Ethernet Multirate Design Example: Simulation Testbench 4.1.2. Ethernet Multirate Hardware Design Example
5. Detailed Description for Ethernet to CPRI Design Example x
5.1. Ethernet to CPRI Design Example: Functional Description 5.2. Ethernet to CPRI Design Example: Registers
5.1. Ethernet to CPRI Design Example: Functional Description x
5.1.1. Ethernet to CPRI Dynamic Reconfiguration Design Example: Simulation Testbench 5.1.2. Ethernet to CPRI Dynamic Reconfiguration Hardware Design Example
1. Quick Start Guide
2. Detailed Description for CPRI Multirate Design Example
3. Detailed Description for PMA/FEC Direct PHY Multirate Design Example
4. Detailed Description for Ethernet Multirate Design Example
5. Detailed Description for Ethernet to CPRI Design Example
6. F-Tile Dynamic Reconfiguration Design Example User Guide Archives
7. Document Revision History for F-Tile Dynamic Reconfiguration Design Example User Guide

4.2. Ethernet Multirate Design Example: Registers

Table 13.  Address Map for 25GE-1 and 25GE-1 PTP Base Variant
Address Range Maps to
0x00000000 - 0x0000FFFF Ethernet Registers for port 0
0x00800000 - 0x008FFFFF Transceiver Registers for port 0
0x00100000 - 0x0010FFFF 25G Packet Client
0x10035000 - 0x100353FF Dynamic Reconfiguration Controller Registers
Table 14.  Address Map for 100GE-4 and 100GE-4 PTP Base Variant
Address Range Maps to
0x00000000 - 0x0000FFFF Ethernet Registers for port 0
0x00800000 - 0x008FFFFF Transceiver Registers for port 0
0x00010000 - 0x0001FFFF Ethernet Registers for port 1
0x00900000 - 0x009FFFFF Transceiver Registers for port 1
0x00020000 - 0x0002FFFF Ethernet Registers for port 2
0x00A00000 - 0x00AFFFFF Transceiver Registers for port 2
0x00030000 - 0x0003FFFF Ethernet Registers for port 3
0x00B00000 - 0x00BFFFFF Transceiver Registers for port 3
0x00100000 - 0x0010FFFF 100G Packet Client
0x00200000 - 0x0020FFFF 25G Packet Client for port 0
0x00210000 - 0x0021FFFF 25G Packet Client for port 1
0x00220000 - 0x0022FFFF 25G Packet Client for port 2
0x00230000 - 0x0023FFFF 25G Packet Client for port 3
0x00300000 - 0x0030FFFF 50G Packet Client for port 0
0x00310000 - 0x0031FFFF 50G Packet Client for port 2
0x10035000 - 0x100353FF Dynamic Reconfiguration Controller Registers
Table 15.  Address Map for 400GE-8 and 400GE-8 PTP Base Variant
Address Range Maps to
0x00000000 - 0x0000FFFF Ethernet Registers for port 0
0x00800000 - 0x008FFFFF Transceiver Registers for port 0
0x00010000 - 0x0001FFFF Ethernet Registers for port 1
0x00900000 - 0x009FFFFF Transceiver Registers for port 1
0x00020000 - 0x0002FFFF Ethernet Registers for port 2
0x00A00000 - 0x00AFFFFF Transceiver Registers for port 2
0x00030000 - 0x0003FFFF Ethernet Registers for port 3
0x00B00000 - 0x00BFFFFF Transceiver Registers for port 3
0x00100000 - 0x0010FFFF 400G Packet Client
0x00200000 - 0x0020FFFF 100G Packet Client for port 0
0x00210000 - 0x0021FFFF 100G Packet Client for port 1
0x00220000 - 0x0022FFFF 100G Packet Client for port 2
0x00230000 - 0x0023FFFF 100G Packet Client for port 3
0x00300000 - 0x0030FFFF 200G Packet Client for port 0
0x00310000 - 0x0031FFFF 200G Packet Client for port 2
0x10035000 - 0x100353FF Dynamic Reconfiguration Controller Registers
Table 16.  Address Map for 400GE-4 FHT Base Variant
Address Range Maps to
0x00000000 - 0x0000FFFF Ethernet Registers for port 0
0x00800000 - 0x008FFFFF Transceiver Registers for port 0
0x00010000 - 0x0001FFFF Ethernet Registers for port 1
0x00900000 - 0x009FFFFF Transceiver Registers for port 1
0x00020000 - 0x0002FFFF Ethernet Registers for port 2
0x00A00000 - 0x00AFFFFF Transceiver Registers for port 2
0x00030000 - 0x0003FFFF Ethernet Registers for port 3
0x00B00000 - 0x00BFFFFF Transceiver Registers for port 3
0x00100000 - 0x0010FFFF 400G Packet Client
0x00200000 - 0x0020FFFF 100G Packet Client for port 0
0x00210000 - 0x0021FFFF 100G Packet Client for port 1
0x00220000 - 0x0022FFFF 100G Packet Client for port 2
0x00230000 - 0x0023FFFF 100G Packet Client for port 3
0x00300000 - 0x0030FFFF 200G Packet Client for port 0
0x00310000 - 0x0031FFFF 200G Packet Client for port 2
0x10035000 - 0x100353FF Dynamic Reconfiguration Controller Registers
Level Two Title