AN 940: Incremental Block-Based Compilation Tutorial: for Intel® Agilex™ F-Series FPGA Development Board

ID 691276
Date 12/10/2021
Public

1.3.7. Step 7: Verify Preservation and Optimized Results

After compilation is complete, follow these steps to verify that the Compiler uses the preserved partitions, and that the optimized design block now meets timing requirements:
  1. In the Compilation Report (Processing > Compilation Report), under the Fitter folder, expand the Preserved Assignments folder. The reports indicate use of the preserved partitions.
    Figure 11. Preserved Partitions Report
  2. Click Tools > Timing Analyzer , and then double-click Update Timing Netlist.
  3. Run the report_timing.tcl script to regenerate the timing analysis reports:
    source report_timing.tcl
    Timing analysis data in the inst_i4 report folder now indicates that the blinking_led_i4 partition meets timing requirements.
    Figure 12. Optimized u_blinking_led_i4 Meets Timing
  4. Click the inst_i4 report in the Report pane. Also check the slack and placement results for the big_partition1_top, blinking_led_i1, blinking_led_i2, and blinking_led_i3 partitions. The slack value is similar to performance at the time of preservation. The placement results are the same as at the time of preservation.