Intel® FPGA SDK for OpenCL™ Pro Edition: Programming Guide

ID 683846
Date 6/21/2022

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11.1.5. Verifying the RTL Modules

The creator of an OpenCL™ library is responsible for verifying the RTL modules within the library, both as stand-alone entities and as part of an OpenCL system.
  1. Verify each RTL module using standard hardware verification methods.
  2. Modify one of Intel® FPGA SDK for OpenCL™ library design examples to test your RTL modules inside the overall OpenCL system.
    This testing step is critical to prevent library users from encountering hardware problems.

    It is crucial that you set the values for the ATTRIBUTES elements in the object manifest file correctly. Because you cannot simulate the entire OpenCL system, you likely cannot discover problems caused by interface-level errors until hardware runs.

  3. Invoke the aocl library [<command option>] command.
    Note: The Intel® FPGA SDK for OpenCL™ library utility performs consistency checks on the object manifest file and source files, with some limitations.
    • For a list of supported <command options>, invoke the aocl library command.
    • The library utility does not detect errors in values assigned to elements within the ATTRIBUTES, MEM_INPUT, and AVALON_MEM elements in the object manifest file.
    • The library utility does not detect RTL syntax errors. You must check the <your_kernel_filename>/quartus_sh_compile.log file for RTL syntax errors. However, parsing the errors might be time consuming.

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