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- 3.4. Listing the Intel® FPGA SDK for OpenCL™ Offline Compiler Command Options (no argument, -help, or -h)
- 7.5. Specifying the Name of an Intel® FPGA SDK for OpenCL™ Offline Compiler Output File (-o <filename>)
- 7.6. Compiling a Kernel for a Specific FPGA Board and Custom Platform (-board=<board_name>) and (-board-package=<board_package_path>)
- 7.13. Converting Warning Messages from the Intel® FPGA SDK for OpenCL™ Offline Compiler into Error Messages (-Werror)
- 7.17. Forcing a Single Store Ring to Reduce Area at the Expense of Write Throughput to Global Memory (-force-single-store-ring)
- 7.18. Forcing Fewer Read Data Reorder Units to Reduce Area at the Expense of Read Throughput to Global Memory (-num-reorder)
184.108.40.206. Implementing I/O Pipes Using the io Attribute
In the Intel® FPGA SDK for OpenCL™ channels extension, the io("chan_id") attribute specifies the I/O feature of an accelerator board with which a channel interfaces. The chan_id argument is the name of the I/O interface listed in the board_spec.xml file of your Custom Platform. The same I/O features can be used to identify I/O pipes.
Because peripheral interface usage might differ for each device type, consult your board vendor's documentation when you implement I/O pipes in your kernel program. Your OpenCL™ kernel code must be compatible with the type of data generated by the peripheral interfaces. If there is a difference in the byte ordering between the external I/O pipes and the kernel, the Intel® FPGA SDK for OpenCL™ Offline Compiler converts the byte ordering seamlessly upon entry and exit.
- Implicit data dependencies might exist for pipes that connect to the board directly and communicate with peripheral devices via I/O pipes. These implicit data dependencies might lead to compilation issues because the offline compiler cannot identify these dependencies.
- External I/O pipes communicating with the same peripherals do not obey any sequential ordering. Ensure that the external device does not require sequential ordering because unexpected behavior might occur.
- Consult the board_spec.xml file in your Custom Platform to identify the input and output features available on your FPGA board.
For example, a board_spec.xml file might include the following information on I/O features:
<channels> <interface name="udp_0" port="udp0_out" type="streamsource" width="256" chan_id="eth0_in"/> <interface name="udp_0" port="udp0_in" type="streamsink" width="256" chan_id="eth0_out"/> <interface name="udp_0" port="udp1_out" type="streamsource" width="256" chan_id="eth1_in"/> <interface name="udp_0" port="udp1_in" type="streamsink" width="256" chan_id="eth1_out"/> </channels>
The width attribute of an interface element specifies the width, in bits, of the data type used by that pipe. For the example above, both the uint and float data types are 32 bits wide. Other bigger or vectorized data types must match the appropriate bit width specified in the board_spec.xml file.
- Implement the io attribute as demonstrated in the following code example. The io attribute names must match those of the I/O channels (chan_id) specified in the board_spec.xml file.
__kernel void test (pipe uint pkt __attribute__((io(“enet”))),; pipe float data __attribute__((io(“pcie”))));Attention: Declare a unique io("chan_id") handle for each I/O pipe specified in the channels XML element within the board_spec.xml file.
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