Intel Agilex® 7 Configuration User Guide

ID 683673
Date 2/05/2024
Public
Document Table of Contents

3.1.1. Avalon® -ST Configuration Scheme Hardware Components and File Types

You can use the following components to implement the Avalon® -ST configuration scheme:

  • A CPLD with Parallel Flash Loader II Intel® FPGA IP and common flash interface (CFI) flash or Quad SPI flash memory
  • A custom host, typically a microprocessor, with any external memory
  • The Intel® FPGA Download Cable II to connect the Intel® Quartus® Prime Programmer to the PCB.

The following block diagram illustrates the components and design flow using the Avalon® -ST configuration scheme.

Figure 19. Components and Design Flow for .pof Programming
Table 18.  Output File Types
Programming File Type Extension Description
Programmer Object File .pof

The .pof is a proprietary Intel® FPGA file type. Use the Parallel Flash Loader II Intel® FPGA IP via a JTAG header to write the .pof to an external CFI flash or serial flash device.

Raw Binary File .rbf

You can also use the .rbf with the Avalon® -ST configuration scheme and an external host such as a CPU or microcontroller.

You can program the configuration bitstreams or data in the .rbf file directly into flash via a third-party programmer. Then, you can use an external host to configure the device with the Avalon® -ST configuration scheme.

If you choose a third-party microprocessor for Avalon® -ST configuration, refer to the Avalon® Streaming Interfaces in the Avalon® Interface Specifications for protocol details.

Note: Intel Agilex® 7 devices using Avalon® ST x32 configuration and DDR x72 external memory interfaces are limited to a maximum of three memory interfaces. The Avalon® ST x8 and x16 can support up to four DDR x72 external memory interfaces. Refer to the External Memory Interfaces Intel Agilex® 7 F-Series and I-Series FPGA IP User Guide for more details.