ASMI Parallel II Intel® FPGA IP User Guide

ID 683669
Date 7/29/2020
Public

Example 6: Read and Write nvcr

#Bit 15:12 indicates number of dummy clock cycles
read_nvcr 
#Change dummy cycles to 8
write_nvcr 0x8fff
#Read back non-volatile configuration register to confirm the dummy cycles is 
#changed
read_nvcr

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