Intel Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

ID 683633
Date 12/04/2020
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G. Documentation Available for the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 1.2.1 Release

The following documents are on the Intel FPGA web page. To access a document, click the link.

Table 7.  Documentation Available for the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 1.2.1 Release
Document Link to Access Document
10 Gbps Ethernet AFU Design Example User Guide 10 Gbps Ethernet Accelerator Functional Unit (AFU) Design Example User Guide
40 Gbps Ethernet AFU Design Example User Guide 40 Gbps Ethernet Accelerator Functional Unit (AFU) Design Example User Guide
Open Programmable Acceleration Engine (OPAE) C API Programming Guide GitHub Link
Open Programmable Acceleration Engine (OPAE) Linux Device Driver Architecture Guide GitHub Link
Open Programmable Acceleration Engine (OPAE) Tools Guide GitHub Link
Intel® Accelerator Functional Unit (AFU) Simulation Environment (ASE) User Guide GitHub Link
Intel® Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide

Intel® Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide

Acceleration Stack for Intel® Xeon® CPU with FPGAs Core Cache Interface (CCI-P) Reference Manual

Acceleration Stack for Intel® Xeon® CPU with FPGAs Core Cache Interface (CCI-P) Reference Manual

Accelerator Functional Unit (AFU) Developer User Guide

Accelerator Functional Unit (AFU) Developer User Guide

Streaming DMA Accelerator Functional Unit (AFU) User Guide Streaming DMA Accelerator Functional Unit AFU User Guide
Native Loopback Accelerator Functional Unit (AFU) User Guide

Native Loopback Accelerator Functional Unit (AFU) User Guide

Networking Interface for Open Programmable Acceleration Engine (OPAE): Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA , previously known as HSSI User Guide for Intel® FPGA Programmable Acceleration Card (Intel® FPGA PAC) Intel® Arria® 10 GX FPGA Networking Interface for Open Programmable Acceleration Engine (OPAE): Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA
OpenCL* on Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA Quick Start User Guide

OpenCL* on Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA Quick Start User Guide

Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA with Intel® Arria® 10 GX FPGA Datasheet Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA with Intel® Arria® 10 GX FPGA Datasheet
Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs v1.2.1 Release Notes Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs v1.2.1 Release Notes
Security User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA Security User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

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