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1.5.1. Install the Design Files
1.5.2. Analyze System Requirements
1.5.3. Start the Software and Open the Example Project
1.5.4. Create a New System
1.5.5. Define the System in
1.5.6. Integrate the System into the Project
1.5.7. Download the Hardware Design to the Target FPGA
1.5.8. Develop Software Using the SBT for Eclipse
1.5.9. Run the Program on Target Hardware
1.5.5.1. Specify Target FPGA and Clock Settings
1.5.5.2. Add the On-Chip Memory
1.5.5.3. Add the Processor Core
1.5.5.4. Add the JTAG UART
1.5.5.5. Add the Interval Timer
1.5.5.6. Add the System ID Peripheral
1.5.5.7. Add the PIO
1.5.5.8. Specify Base Addresses and Interrupt Request Priorities
1.5.5.9. Generate the System
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1.5.3. Start the Quartus II Software and Open the Example Project
The Quartus II project serves as an easy starting point for the Nios II development flow. The Quartus II project contains all settings and design files required to create the .sof. To open the Quartus II project, perform the following steps:
- Start the Quartus II software.
- Click Open Existing Project on the splash screen, or, on the File menu, click Open Project.
The Open Project dialog box appears.
- Browse to the <design files directory>.
- Select the file nios2_quartus2_project.qpf and click Open.
- To display the Block Diagram File (.bdf) nios2_quartus2_project.bdf, perform the following steps:
- On the File menu, click Open.
The Open dialog box appears.
- Browse to the <design files directory>.
- Select nios2_quartus2_project.bdf and click Open.
The .bdf contains an input pin for the clock input and eight output pins to drive LEDs on the board. - On the File menu, click Open.
Next, you create a new Qsys system, which you ultimately connect to these pins.