AN 717: Nios II Gen2 Hardware Development Tutorial

ID 683615
Date 9/22/2014
Document Table of Contents

1.4.2. Defining and Generating the System in

After analyzing the system hardware requirements, you use to specify the processor core(s), memory, and other components your system requires. automatically generates the interconnect logic to integrate the components in the hardware system.

You can select from a list of standard processor cores and components provided with the EDS. You can also add your own custom hardware to accelerate system performance. You can add custom instruction logic to the core which accelerates CPU performance, or you can add a custom component which offloads tasks from the CPU. This tutorial covers adding standard processor and component cores, and does not cover adding custom logic to the system.

The primary outputs of are the following file types:

Table 1.   Primary Output File Types
File Types Description
Design File (.qsys) Contains the hardware contents of the system
SOPC Information File (.sopcinfo) Contains a description of the contents of the .qsys file in Extensible Markup Language File (.xml) format. The EDS uses the .sopcinfo file to create software for the target hardware.
Hardware description language (HDL) files Are the hardware design files that describe the system. The software uses the HDL files to compile the overall FPGA design into an SRAM Object File (.sof).