AN 717: Nios II Gen2 Hardware Development Tutorial

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ID 683615
Date 9/22/2014
Public
Document Table of Contents
Document Table of Contents x
1. Hardware Development Tutorial
1. Hardware Development Tutorial x
1.1. Software and Hardware Requirements 1.2. 1.3. Design Example 1.4. System Development Flow 1.5. Creating the Design Example 1.6. Document Revision History
1.4. System Development Flow x
1.4.1. Analyzing System Requirements 1.4.2. Defining and Generating the System in 1.4.3. Integrating the System into the Project 1.4.4. Developing Software with the Software Build Tools for Eclipse 1.4.5. Running and Debugging Software on the Target Board 1.4.6. Varying the Development Flow
1.5. Creating the Design Example x
1.5.1. Install the Design Files 1.5.2. Analyze System Requirements 1.5.3. Start the Software and Open the Example Project 1.5.4. Create a New System 1.5.5. Define the System in 1.5.6. Integrate the System into the Project 1.5.7. Download the Hardware Design to the Target FPGA 1.5.8. Develop Software Using the SBT for Eclipse 1.5.9. Run the Program on Target Hardware
1.5.5. Define the System in x
1.5.5.1. Specify Target FPGA and Clock Settings 1.5.5.2. Add the On-Chip Memory 1.5.5.3. Add the Processor Core 1.5.5.4. Add the JTAG UART 1.5.5.5. Add the Interval Timer 1.5.5.6. Add the System ID Peripheral 1.5.5.7. Add the PIO 1.5.5.8. Specify Base Addresses and Interrupt Request Priorities 1.5.5.9. Generate the System
1.5.6. Integrate the System into the Project x
1.5.6.1. Instantiate the System Module in the Project 1.5.6.2. Add IP Variation File 1.5.6.3. Assign FPGA Device 1.5.6.4. Assign FPGA Pin Locations 1.5.6.5. Set Timing 1.5.6.6. Compile the Project and Verify Timing
1.5.8. Develop Software Using the SBT for Eclipse x
1.5.8.1. Create a New Application and BSP from Template 1.5.8.2. Compile the Project
1. Hardware Development Tutorial

1.5.5.4. Add the JTAG UART

The JTAG UART provides a convenient way to communicate character data with the processor through the . To add the JTAG UART, perform the following steps:

  1. On the IP Catalog tab, expand Interface Protocols, expand Serial, and then click JTAG UART.
  2. Click Add.
    The JTAG UART parameter editor appears and do not change the default settings.
  3. Click Finish and return to the System Contents tab.
    The JTAG UART instance appears in the system contents table.
  4. In the Name column, right-click the JTAG UART and click Rename.
  5. Type jtag_uart and press Enter.
  6. Connect the clk port of the clk_0 clock source to the clk port of the JTAG UART.
  7. Connect the clk_reset port of the clk_0 clock source to the reset port of the JTAG UART.
  8. Connect the data_master port of the processor to the avalan_jtag_slave port of the JTAG UART.
    The instruction_master port of the processor does not connect to the JTAG UART because the JTAG UART is not a memory device and cannot send instructions to the processor.
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