Intel® MAX® 10 Analog to Digital Converter User Guide

ID 683596
Date 1/03/2024
Document Table of Contents

2.5. ADC Logic Simulation Output

By default, the ADC logic simulation outputs a fixed unique value for each ADC channel. However, you can enable an option to specify your own output values for each ADC channel other than the TSD.

The ADC simulation model for Intel® MAX® 10 devices supports the standard digital logic simulators that the Intel® Quartus® Prime software supports.