Intel® MAX® 10 Analog to Digital Converter User Guide

ID 683596
Date 1/03/2024
Document Table of Contents

2.5.2. User-Specified ADC Logic Simulation Output

You can configure the Modular ADC Core or Modular Dual ADC Core IP core to output user-specified values in the logic simulation for each ADC channel except the TSD channel.

If you enable this feature, you must provide a simulation stimulus input file for each ADC channel that you enable. The logic simulation reads the input file for each channel and outputs the value of the current sequence. Once the simulation reaches the end of the file, it repeats from the beginning of the sequence.

The stimulus input file is a plain text file that contains two columns of numbers:

  • The first column of numbers is ignored by the simulation model. You can use any values that you want such as time or sequence. The actual data sequencing is based on the text rows.
  • The second column contains the voltage values.

The ADC IP core automatically converts each voltage value to a 12-bit digital value based on the reference voltage you specify in the IP core parameter settings.

Figure 23. Simulation Output Example, One Channel Enabled

Figure 24. Simulation Output Example, Two Channels Enabled