E-tile Hard IP Intel® Stratix® 10 Design Examples User Guide: Ethernet, CPRI PHY, and Dynamic Reconfiguration

ID 683578
Date 9/26/2022
Public

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Document Table of Contents

4.5.7.1. Configuring for 100G NRZ with RSFEC [KR-FEC (528,514)]

Transceiver configuration:

  • [T1] Write 0xC7 to Transceiver channel register 0x4[7:0]
  • [T2] Write 0x2C to Transceiver channel register 0x5[7:0]
  • [T3] Write 0x0F to Transceiver channel register 0x6[7:0]
  • [T4] Write 0x86 to Transceiver channel register 0x7[7:0]
  • [T5] Write 0xA5 to Transceiver channel register 0xA4[7:0]
  • [T6] Write 0xA5 to Transceiver channel register 0xA8[7:0]
  • [T7] Write 0x55 to Transceiver channel register 0xB0[7:0]
  • [T8] Write 0x07 to Transceiver channel register 0xE8[7:0]
Note: Repeat steps [T1] to [T8] for each Transceiver channel.

Ethernet configuration:

  • [E1] Write 0x312C7 to Ethernet register 0x37A
  • [E2] Write 0x9FFD8028 to Ethernet register 0x40B
  • [E3] Clear bits [3] and [9] of Ethernet register 0x30E (Disable RX PCS Alignment)

RS-FEC configuration:

  • [R1] Write 0x0F00 to RS-FEC register 0x04 (Re-enable RS-FEC)
  • [R2] Write 0x0000 to RS-FEC register 0x10
  • [R3] Write 0x1111 to RS-FEC register 0x14
  • [R4] Write 0x0080 to RS-FEC register 0x30
  • [R5] Write 0x08 to RS-FEC register 0x40
  • [R6] Write 0x08 to RS-FEC register 0x44
  • [R7] Write 0x08 to RS-FEC register 0x48
  • [R8] Write 0x08 to RS-FEC register 0x4C