Intel® FPGA Programmable Acceleration Card D5005 Data Sheet

ID 683568
Date 11/04/2019

4. FPGA Interface Manager

The FPGA Interface Manager (FIM) contains the FPGA logic to support the accelerators, including the PCIe* IP core, the Core Cache Interface protocol (CCI-P) fabric, the on-board DDR memory interface and management engine. In addition, the FIM allows dynamic downloading of new accelerator functions and updates to the FIM. Specific features of the FIM are listed in the following documents:
  • Intel Acceleration Stack Quick Start Guide for Intel FPGA Programmable Acceleration Card D5005
  • OPAE Intel FPGA Linux Device Driver Architecture Guide

The 2 Gb flash memory stores the FPGA Interface Manager (FIM).