AN 100: In-System Programmability Guidelines

ID 683546
Date 9/22/2014
Document Table of Contents

1.6. ISP through In-Circuit Testers

This section addresses specific issues associated with programming ISP-capable devices through in-circuit testers.

Using “F” vs. Non-“F” Devices

MAX devices use either fixed algorithms (“F”) or branching algorithms (non-“F”). Most in-circuit tester file formats—for example, .svf, Pattern Capture Format (.pcf), DTS, and ASC, are “fixed” or deterministic, which means they can only support one fixed algorithm without branching. The MAX+PLUS II software generates SVF Files for “F” devices. Because the algorithms in SVF Files are constant, you can always use these files to program future “F” devices.

Altera does not recommend programming non-“F” devices via in-circuit testers. Non-“F” devices require branching based on three variables read from the device: programming pulse time, erase pulse time, and manufacturer silicon ID or JTAG ID. These three variables are programmed into all non-“F” Altera devices. Using only “F” devices eliminates problems you may experience if these variables change.

Maximum Vectors per File

The file formats for “bed of nails” in-circuit testers generally require very large vector files for in-system programming. When the file is larger than the available memory in the tester, you must divide the file into smaller files. For example, Altera’s svf2pcf utility automatically divides a single .svf file into several smaller files. In addition, the utility allows users to either specify the maximum number of vectors per file or use a default value. If you put too many vectors in a single file, an error message occurs. If you receive this error, simply reduce the number of vectors per file.

Pull-Up and Pull-Down Resistors

Testers may require pull-up or pull-down resistors on various signal traces. Contact the in-circuit tester manufacturer directly for specific information.