Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs Version 1.3.1 Release Notes: Intel FPGA Programmable Acceleration Card N3000-N

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ID 683474
Date 6/16/2021
Public
Document Table of Contents
Document Table of Contents x
Notice Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs Version 1.3.1 Release Notes Intel Provided FPGA Factory Image Packet Drop Migrating your FPGA RTL Design from Intel® Acceleration Stack v1.1 to Intel® Acceleration Stack v1.3.1
Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs Version 1.3.1 Release Notes x
Minimum Requirements Supported Features Intel FPGA PAC N3000-N Reference Table Known Issues Component Information Supported Software Revision History for Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs v1.3.1 Release Notes
Component Information x
Broadcom* PEX8747 PCIe* Switch Intel Ethernet Controller XL710
Supported Software x
Intel® Network Adapter Drivers
Notice
Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs Version 1.3.1 Release Notes
Intel Provided FPGA Factory Image Packet Drop
Migrating your FPGA RTL Design from Intel® Acceleration Stack v1.1 to Intel® Acceleration Stack v1.3.1

Minimum Requirements

The minimum requirements for the Intel FPGA PAC N3000-N must include:
  • Intel® Xeon® Scalable processor
  • A PCI Express* x16 Slot
  • 48 GB of free memory ( Intel® Quartus® Prime Pro Edition software requires at least 48 GB for compiling a design targeting an Intel® Arria® 10 FPGA device)
  • Operating System:
    • CentOS Linux* version 7.6 kernel 4.19
    • Red Hat Enterprise Linux (RHEL*) version 8.2 kernel 4.18
  • OPAE Software Stack requires Python 3
  • PACsign requires Python 3.6
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