Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs Version 1.3.1 Release Notes: Intel FPGA Programmable Acceleration Card N3000-N

ID 683474
Date 6/16/2021
Public

Broadcom* PEX8747 PCIe* Switch

Intel performs PCIe* compliance testing for all Intel® FPGA PAC N3000-N variations. The following PCIe* compliance tests are known to start in an invalid state.
Note: None of the following PCIe* compliance test failures affect the PCIe* functionality or the Intel® FPGA PAC functionality.
Table 5.  PCIe Compliance Test Failures
PCIe* Compliance Test Test Failure Reference
TD_1_42_ACS Extended Cap Structure Test -
TD_1_50 Slot Capabilities2, Control2, and Status2 Registers Test -
TD_2_7_Link Speed Test (2.5, 5.0, 8.0)

Broadcom* PEX 8749/48/47/33/32/25/24/23/17/16/13/12 Errata

Refer to 1.32 PEX 87xx Downstream Port Incorrectly Sets Link Status Register’s “Link Autonomous Bandwidth Status” Bit for any Successful Speed Change Event.

TD_2_9 Software Requested Link Equalization Test (2.5, 5.0, 8.0)

Broadcom* PEX 8749/48/47/33/32/25/24/23/17/16/13/12 Errata

Refer to 1.32 PEX 87xx Downstream Port Incorrectly Sets Link Status Register’s “Link Autonomous Bandwidth Status” Bit for any Successful Speed Change Event.

Preset Configuration Test

Broadcom* PEX 8749/48/47/33/32/25/24/23/17/16/13/12 Errata

Refer to 1.19 PEX 87xx Port Does Not Reject Illegal Coefficients for the Specified Condition.

Gen 1 Rx Test -

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