PCI Express: Migrating to Stratix 10 from Arria 10 for the Avalon-MM and Avalon-MM DMA Interfaces

ID 683459
Date 1/23/2017
Public

3.4. Write DMA Interface

Table 5.  Write DMA Interface
Stratix 10 Arria 10, Stratix V Comments

wr_dma_*

WrDMA*

Signal names differ, but functionality is the same unless otherwise noted below.

wr_dma_read_data_o[255:0]

WrDmaReadData_o[<n-1>:0]

Stratix 10: Supports 256-bit interface only.

Arria 10, Stratix V: <n> = 128 or 256

wr_dma_burst_count_i[4:0] WrDMABurstCount_i[<n-1>:0]

Stratix 10: Supports 256-bit interface only.

Arria 10, Stratix V:

<n> = 5 for a 256-bit interface.

<n> = 6 for a 128-bit interface.

wr_dts_*

WrDTS* Signal names differ but functionality is the same unless otherwise noted below.
wr_dts_write_data_i[255:0] WrDTSWriteData_i[<n-1>:0]

Stratix 10: Supports 256-bit interface only.

Arria 10, Stratix V:

<n> = 128 or 256

wr_dts_burst_count_i[4:0] WrDTSBurstCount_i[<n-1>:0]

Stratix 10: Supports 256-bit interface only.

Arria 10, Stratix V:

<n> = 5 for a 256-bit interface.

<n> = 6 for a 128-bit interface.

wr_dcm_* WrDCM* Signal names differ but functionality is the same.
wr_ast_rx* WrAstRx* Signal names differ but functionality is the same.
wr_ast_tx* WrAstTx* Signal names differ but functionality is the same.

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