PCI Express: Migrating to Stratix 10 from Arria 10 for the Avalon-MM and Avalon-MM DMA Interfaces
ID
683459
Date
1/23/2017
Public
3.1. Reset Interfaces
3.2. Serial Interface
3.3. Read DMA Interface
3.4. Write DMA Interface
3.5. Avalon-MM Slave Interfaces
3.6. Avalon-MM Master Interfaces
3.7. Control and Status Register Interface
3.8. Hard IP Reconfiguration Interface
3.9. Interrupt Interface
3.10. Error Interface
3.11. Status and Link Training Interface
3.12. PHY Interface for PCI Express (PIPE) Interface
3.13. Test Interface
3.1. Reset Interfaces
| Stratix 10 | Arria 10, Stratix V | Comments |
|---|---|---|
| app_nreset_status reset_status |
nreset_status |
Stratix 10: Supports two signals that have the same functionality but are polarity-inverted:
Arria 10, Stratix V: Supports only nreset_status, an active-low reset. |