PCI Express: Migrating to Stratix 10 from Arria 10 for the Avalon-MM and Avalon-MM DMA Interfaces

ID 683459
Date 1/23/2017
Public

3.11. Status and Link Training Interface

Table 12.  Status and Link Training Interface
Stratix 10 Arria 10, Stratix V Comments
ltssmstate[5:0]

ltssmstate[4:0]

Stratix 10: Provides finer granularity and different encoding. For example, L0 is now 0x11 instead of 0x0F. Refer to user guide for complete mapping.

link_up

Not supported

Stratix 10: Adds bit for x16 configuration.

Not supported

ev128ns

ev1us

hotrst_exit

l2_exit

dl_up

Stratix 10: Not supported

Arria 10, Stratix V: Refer to the Arria 10 PCIe user guides for more information.

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