4. Verifying the Functionality of Your Design
Verify the functionality of your design by compiling your component and testbench to an x86-64 executable that you can debug with a native C++ debugger. This process is sometimes referred to as debugging through emulation.
Compiling your design to an x86-64 executable is faster than generating and simulating RTL. This faster compilation time lets you debug and refine your component algorithms quickly before you move on to see how your component is implemented in hardware.
- Use the i++ -march=x86-64 command.
- On Linux systems, use the g++ command.
- On Windows systems, use Microsoft Visual Studio.
- Running the program to see if generates the expected output.
- Using printf statements in your code to output variable values at certain points in your code.
- Stepping through your code with a debugger.
If you want step through your code with a debugger, ensure that you set your compiler command to include debug information and to generate unoptimized binary files. The i++ command generates debug information by default, and the -march=x86-64 command option generates unoptimized binary files.
On Linux systems, you can use GDB to debug your component and testbench, even if you used the i++ command to compile your code for functional verification.
On Windows systems, you can use Microsoft Visual Studio to debug your component and testbench, even if you used the i++ command to compile your code for functional verification.
Using the g++ command or Microsoft Visual Studio might require additional configuration to compile your Intel® HLS Compiler Pro Edition code. For details, see Compiler Interoperability in the Intel® High Level Synthesis Compiler Pro Edition Reference Manual.
You can automate the process by using a makefile or batch script. Use the makefiles and scripts provided in the Intel® HLS Compiler Pro Edition example designs and tutorials as guides for creating your own makefiles or batch scripts.
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