1. Intel® High Level Synthesis Compiler Pro Edition User Guide 2. Overview of the Intel® High Level Synthesis (HLS) Compiler Pro Edition 3. Creating a High-Level Synthesis Component and Testbench 4. Verifying the Functionality of Your Design 5. Optimizing and Refining Your Component 6. Verifying Your IP with Simulation 7. Synthesize your Component IP with Intel® Quartus® Prime Pro Edition 8. Integrating your IP into a System A. Reviewing the High-Level Design Reports (report.html) B. Intel® HLS Compiler Pro Edition Restrictions C. Intel® HLS Compiler Pro Edition User Guide Archives D. Document Revision History for Intel® HLS Compiler Pro Edition User Guide
8.1. Adding the HLS Compiler-Generated IP into an Intel® Quartus® Prime Pro Edition Project
To use the IP generated by the Intel® HLS Compiler in an Intel® Quartus® Prime Pro Edition project, you must first add the .ip file to the project.
The .ip file contains information to add to all of the necessary HDL files for the component. It also applies to any component-specific Intel® Quartus® Prime Settings File (QSF) settings that are necessary for IP synthesis.
- Create an Intel® Quartus® Prime Pro Edition project.
- Click Project > Add/Remove Files in Project.
- In the Settings dialog box, browse to and select the component .ip file:
For example, <result>.prj/components/<component_name>/<component_name>.ip
- Instantiate the component top-level module in the Intel® Quartus® Prime project. For an example on how to instantiate the component's top-level module, refer to the <result>.prj/components/<component_name>/<component_name>_inst.v file.