1.4. Acceleration Glossary
|Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs||Acceleration Stack||
A collection of software, firmware and tools that provides performance-optimized connectivity between an Intel® FPGA and an Intel® Xeon® processor.
|Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA||Intel® PAC with Intel® Arria® 10 GX FPGA||
PCIe* accelerator card with an Intel® Arria® 10 FPGA. Programmable Acceleration Card is abbreviated PAC.
Contains an FPGA Interface Manager (FIM) that pairs with an Intel® Xeon® processor over PCIe* bus.
|Intel® Xeon® Scalable Platform with Integrated FPGA||Integrated FPGA Platform||
Intel® Xeon® plus FPGA platform with the Intel® Xeon® and an FPGA in a single package and sharing a coherent view of memory via the Ultra Path Interconnect (UPI).
|OPAE_PLATFORM_ROOT||A Linux shell environment variable set up during the process of installing the OPAE SDK delivered with the Acceleration Stack.|
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