40Gbps Ethernet Accelerator Functional Unit (AFU) Design Example User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

ID 683436
Date 4/30/2019

4.2. Evaluation with an Alternate MAC/PHY IP

You can use the 40GbE AFU example as a framework to evaluate MAC/PHY IP from third parties or your own IP. The design example instantiates the Intel FPGA MAC/PHY IP in the following AFU RTL source file:

Replace the alt_eth_ultra_0 instance shown in this figure with your own MAC/PHY IP instance. You must provide any necessary wrapper shim logic to integrate your IP within the AFU design example framework.

Figure 4. 40GbE AFU Design Example Hierarchy

Did you find the information on this page useful?

Characters remaining:

Feedback Message