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1. About the Unified FFT Intel FPGA IPs
2. Getting Started with the Unified FFT Intel FPGA IP
3. Bit-reverse Intel® FPGA IP
4. FFT Intel FPGA IP
5. Parallel FFT Intel FPGA IP
6. Variable Size Bit-reverse Intel FPGA IP
7. Variable Size FFT Intel FPGA IP
8. Unified FFT Intel FPGA IPs User Guide Archive
9. Document Revision History for the Unified FFT Intel FPGA IPs User Guide
1.5. FFT Spectrum
The Unified FFT IPs produce a double-sided frequency spectrum.
The frequency bin 0 (first) contains the DC signal. In natural order, frequency bins 1 to FFT_size/2 contain the positive frequencies in increasing order up to the Nyquist frequency. In natural order, the frequency bin (FFT_size/2) + 1 contains the most negative frequencies equal in absolute value to positive frequencies in bin (FFT_size/2) -1. The negative frequencies decrease in absolute value with increasing bin numbers. The frequency bin FFT_size -1 contains the least negative frequencies equal in absolute value to positive frequencies in bin 1.
For inverse FFTs the input spectrum is expected in this format.