Unified FFT Intel FPGA IPs User Guide

ID 683366
Date 4/05/2021

1. About the Unified FFT Intel FPGA IPs

Updated for:
Intel® Quartus® Prime Design Suite 21.1
IP Version 1.0.0
The Unified FFT IPs comprise the Bit-reverse Intel FPGA IP, the FFT Intel FPGA IP, the Parallel FFT Intel FPGA IP, the Variable Size Bit-reverse Intel FPGA IP, and the Variable Size FFT Intel FPGA IP.

These IP use the same high-level synthesis technology as DSP Builder for Intel FPGAs. The high-level synthesis technology allows you to generate an IP that specifically targets the selected device family, speed grade, and frequency.

Intel recommends you use these Unified FFT IPs and not the FFT IP Core unless:

  • The global enable-based flow control in Unified FFT IPs is not suitable for your requirements.
  • You require 128K or 256K FFTs.
  • You require bidirectional FFTs.
  • You require an in-place or memory-based architecture for low-rate applications.

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