Low Latency 100G Ethernet Intel® Agilex™ FPGA IP Design Example User Guide

ID 683315
Date 12/14/2020

1.1.1. Design Example Parameters

Table 1.  Parameters in the Example Design Tab
Parameter Description
Select Design Available example designs for the IP parameter settings. When you select a design from the Preset library, this field shows the selected design.
Example Design Files

The files to generate for the different development phase.

  • Simulation—generates the necessary files for simulating the example design.
  • Synthesis—generates the synthesis files. Use these files to compile the design in the Intel® Quartus® Prime Pro Edition software for hardware testing and perform static timing analysis.
Generate File Format The format of the RTL files for simulation—Verilog or VHDL.
Select Board Supported hardware for design implementation. When you select an Intel development board, the Target Device is the one that matches the device on the Development Kit.

If this menu is not available, there is no supported board for the options that you select.

None: This option excludes the hardware aspects for the design example.