Low Latency Ethernet 10G MAC Intel® FPGA IP Release Notes

ID 683308
Date 7/08/2024
Public
Document Table of Contents

Low Latency Ethernet 10G MAC IP Core v17.0

Table 18.  v17.0 May 2017
Description Impact
Stratix 10 supports for the following operation modes:
  • 1G/2.5G/10G MAC with 1G/2.5G/10G Multi-rate Ethernet PHY
  • 1G/2.5G/10G MAC with 1G/2.5G/10G Multi-rate Ethernet PHY and IEEE 1588v2
  • 1G/2.5G MAC with 1G/2.5G Multi-rate Ethernet PHY
  • 1G/2.5G MAC with 2.5G Multi-rate Ethernet PHY
  • 10M/100M/1G/10G MAC with IEEE 1588v2
  • 1G/10G MAC with Backplane Ethernet 10GBASE-KR PHY
Design Examples for Low Latency 10G Ethernet MAC:
  • Added the following design examples for Stratix 10:
    • 1G/2.5G Ethernet Design Example with IEEE 1588v2 Feature
    • 1G/2.5G/10G Ethernet Design Example