1. About the 5G Wireless Acceleration Reference Design
The 5G Wireless Acceleration reference design provides IP (Intel FPGA IP and software drivers) to support fronthaul IO and 5G channel coding (forward error correction (FEC)).
The Intel FPGA PAC N3000 provides an on-board PCIe switch that connects fronthaul and 5G channel coding functions to a PCIe Gen3x16 edge connector. The Intel FPGA PAC N3000 is a general-purpose acceleration card for networking.
Figure 1. Data flow for the user image, FEC, and Fronthaul IO