AN 907: Enabling 5G Wireless Acceleration in FlexRAN: for the Intel® FPGA Programmable Acceleration Card N3000

ID 683275
Date 9/10/2020
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2.2.2. 5G LDPC-V Transmitter and Receiver Test Cases

The tables show some test case examples of the LDPC transmitter and receiver, not a complete list. Each test case uses different values or sizes for base graph, Zc value, K’ value, code rate, Qm, E value, k0 value, ON/OFF code block CRC
Table 1.  Test Cases for the Downlink
test case BG Zc K' Code Rate Qm E K0 CRC
0 0 10 184 1/3 1 300 0 ON
1 0 20 400 1/2 4 520 0 ON
2 0 40 800 3/4 4 900 600 ON
3 0 10 184 8/9 1 260 180 OFF
4 0 4 88 2/3 1 80 0 OFF
5 0 5 104 2/3 4 100 120 OFF
6 1 240 2352 1/2 1 2800 0 ON
7 1 256 2520 1/3 2 3200 2048 ON
8 1 9 88 1/3 8 96 117 ON
9 1 80 720 1/3 8 864 1200 OFF
Table 2.  Test Cases for the Uplink
test case BG Zc K' Code Rate Qm E K0 CRC
0 0 10 216 1/3 2 280 330 ON
1 0 20 440 1/2 6 504 440 ON
2 0 40 880 3/4 6 882 0 ON
3 0 10 216 8/9 2 240 0 OFF
4 0 4 80 2/3 2 80 32 OFF
5 0 5 96 2/3 6 102 0 OFF
6 1 240 2400 1/2 6 2802 0 ON
7 1 256 2560 1/3 4 3200 256 ON
8 1 9 80 1/3 8 96 54 ON
9 1 80 800 1/3 8 840 1600 OFF

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