AN 907: Enabling 5G Wireless Acceleration in FlexRAN: for the Intel® FPGA Programmable Acceleration Card N3000

ID 683275
Date 9/10/2020
Public
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1.1. 5G User Image Features

FEC features:

  • Functionality independent of 25G I/O (look-aside model).
  • Support for one physical function (PF) and 8 virtual functions (VFs) simultaneously accessing acceleration.
  • 64 queues supported equally split between uplink and downlink.
  • Multiqueue high-performance DMA
  • Hybrid automatic repeat request (HARQ) block
  • LDPC transmitter with interleaving and rate matching.
  • LDPC receiver with de-interleaving function and reverse rate matching.
  • Load balancer distributes the pending requests to transmitter and receiver.
  • Early termination CRC24B.
  • Software enablement by baseband device (bbdev) API (targeted to upstream to Data Plane Development Kit (DPDK).
  • Function-level reset.

Fronthaul IO features:

  • 25G MAC and 25G PHY IP connectivity to retimer and a quad small form factor pluggable (QSFP28).
  • 40G MAC and 40G PHY IP connectivity to Intel XL710 networking device.
  • Gearbox to enable 25G connectivity to QSFP28.
  • IEEE 1588 PTP support.
  • Software enablement by Open Platform Acceleration Environment (OPAE), DPDK and bbdev.