ModelSim* - Intel® FPGA Edition Simulation Quick-Start: Intel® Quartus® Prime Standard Edition

ID 683248
Date 12/30/2019

1.4. View Signal Waveforms

Follow these steps to view signals in the testbench_1.v simulation waveform:
  1. Click the Wave window. The simulation waveform ends at 4030 ns, as the testbench specifies. The Wave window lists the CLOCK, WE, OFFSET, RESET_N, and RD_DATA signals.
    Figure 5.  ModelSim* - Intel® FPGA Edition Wave Window
  2. To view the signals in the top-level pll_ram.v design, click the Sim tab. The Sim window synchronizes with the Objects window.
    Figure 6.  ModelSim* - Intel® FPGA Edition Sim and Objects Windows
  3. To view the top-level module signals, expand the tb folder in the Objects tab. Similarly, expand the Test1 folder. The Objects window displays the UP_module, DOWN_module, PLL_module, and RAM_module signals.
  4. In the Sim window, click a module under Test1 to display the module's signals in the Objects window.
  5. View the simulation library files in the Library window.
Figure 7.  ModelSim* - Intel® FPGA Edition Library Window