ModelSim* - Intel® FPGA Edition Simulation Quick-Start: Intel® Quartus® Prime Standard Edition

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ID 683248
Date 12/30/2019
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Document Table of Contents x
1. ModelSim* - Intel® FPGA Edition Simulation Quick-Start ( Intel® Quartus® Prime Standard Edition) 2. ModelSim* - Intel® FPGA Edition Simulation Quick-Start Revision History
1. ModelSim* - Intel® FPGA Edition Simulation Quick-Start ( Intel® Quartus® Prime Standard Edition) x
1.1. Open the Example Design 1.2. Specify EDA Tool Settings 1.3. Launch Simulation from the Intel® Quartus® Prime Software 1.4. View Signal Waveforms 1.5. Add Signals to the Simulation 1.6. Rerun Simulation 1.7. Modify the Simulation Testbench 1.8. (Optional) Run Simulation at Command Line
1. ModelSim* - Intel® FPGA Edition Simulation Quick-Start ( Intel® Quartus® Prime Standard Edition)
2. ModelSim* - Intel® FPGA Edition Simulation Quick-Start Revision History

1.8. (Optional) Run Simulation at Command Line

Follow these steps to generate a .do file that runs the ModelSim* - Intel® FPGA Edition simulator from the command line.
  1. To open the example design project, click File > Open Project, select the pll_ram.qpf project file, and then click OK. The project opens in the Intel® Quartus® Prime GUI.
  2. Click Assignments > Settings > EDA Tool Settings > Simulation > More NativeLink Settings.
  3. Enable Generate third-party EDA tool command scripts without running the EDA tool, and then click OK. In the Settings dialog box, click OK.
  4. To compile the design and generate the .do file, click Processing > Start Compilation.
  5. Click Tools > Run Simulation Tool > RTL Simulation. The Intel® Quartus® Prime software generates the PLL_RAM_run_msim_rtl_verilog_do file that defines the compilation and simulation instructions for the ModelSim* - Intel® FPGA Edition simulator in the /simulation/modelsim/ directory in your project.
  6. In the ModelSim* - Intel® FPGA Edition software, open the PLL_RAM_run_msim_rtl_verilog.do file. This file contains all the commands and library inclusions the simulation requires.
  7. In the Transcript window (View > Transcript), type the following command and press Enter:
    do PLL_RAM_run_msim_rtl_verilog_do

    The ModelSim* - Intel® FPGA Edition simulator runs compilation and simulation, as the .do file specifies.

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