Quartus® Prime Pro Edition User Guide: Block-Based Design
ID
683247
Date
8/30/2025
Public
1.1. Block-Based Design Terminology
1.2. Block-Based Design Overview
1.3. Design Methodologies Overview
1.4. Design Partitioning
1.5. Design Block Reuse Flows
1.6. Incremental Block-Based Compilation Flow
1.7. Setting-Up Team-Based Designs
1.8. Bottom-Up Design Considerations
1.9. Debugging Block-Based Designs with the Signal Tap Logic Analyzer
1.10. Block-Based Design Flows Revision History
3.1. Preserving the Device Resources
3.2. Fixing the Safety Partitions to Logic Lock Regions
3.3. Exporting and Importing Safety Logic Partitions
3.4. I/O Banks in Safety Partitions
3.5. Safety Region Verification Tool
3.6. Implementing Partitions for the Safety Separation Design Flow Revision History
3.4.1. Preserving GPIO IP and the I/Os in I/O Banks in Safety Partitions
3.4.2. Preserving IOPLL IP in I/O Banks in Safety Partitions
3.4.3. Preserving I/Os (other than GPIO IP I/Os) in I/O Banks in Safety Partitions
3.4.4. Verifying the Preserved I/Os in the Safety Partition
3.4.5. HSIO Bank 3A in a Safety Partition
2.1.1. Design Creation Flow
This flow defines the necessary steps for initial design creation in a way that allows you to modify the nonsafety logic in your design without recertifying the complete design. Some of the steps are architectural constraints. You need to perform the remaining steps in the Quartus® Prime software. You use the design creation flow for the first pass certification of your product.
CAUTION:
When you make modifications to the safety logic in your design, you must use the design creation flow.
Figure 21. Design Creation Flow