Triple-Speed Ethernet Intel® FPGA IP Release Notes

ID 683215
Date 12/19/2022
Public

1.4. Triple-Speed Ethernet Intel® FPGA IP v19.4.0

Table 5.  v19.4.0 2021.06.23
Intel® Quartus® Prime Version Description Impact
21.2

Added deterministic latency support for 10/100/1000 Mbps Ethernet MAC with 1000BASE-X/SGMII 2XTBI PCS and IEEE 1588v2 feature enabled variation operating without internal FIFO buffer in full-duplex mode.

This feature is only supported in the Intel® Stratix® 10 E-tile devices.

Design Example for Triple-Speed Ethernet Intel® FPGA IP:
  • Added the following design example for Intel® Stratix® 10 E-tile devices:
    • 10/100/1000Mb Ethernet MAC (Fifoless) with IEEE 1588v2 and 1000BASE-X/SGMII 2XTBI PCS with E-Tile GXB Transceiver
Table 6.  v19.4.0 2021.04.01
Intel® Quartus® Prime Version Description Impact
21.1 Design Example for Triple-Speed Ethernet Intel® FPGA IP:
  • Added the following design example for Intel® Stratix® 10 E-tile devices:
    • 10/100/1000 Mb Ethernet MAC (Fifoless) with 1000 BASE-X/SGMII 2XTBI PCS with E-Tile GXB Transceiver
Table 7.  v19.4.0 2020.12.14
Intel® Quartus® Prime Version Description Impact
20.4 Added support for two new core variants for Intel® Stratix® 10 E-tile devices:
  • 10/100/1000-Mbps Ethernet MAC without internal FIFO buffers with 1000BASE-X/SGMII 2XTBI PCS
  • 10/100/1000-Mbps Ethernet MAC without internal FIFO buffers with IEEE 1588v2 and 1000BASE-X/SGMII 2XTBI PCS
Table 8.  v19.4.0 2019.12.16
Intel® Quartus® Prime Version Description Impact
19.4 Added support for the Intel® Agilex™ device family.

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