Triple-Speed Ethernet Intel® FPGA IP Release Notes

ID 683215
Date 7/08/2024
Public
Document Table of Contents

2.9. Triple-Speed Ethernet Intel® FPGA IP v19.1

Table 16.  v19.1 April 2019
Description Impact
Renamed the Enable Intel FPGA Debug Master Endpoint parameter to Enable Native PHY Debug Master Endpoint (NPDME) as per Intel® rebranding in the Quartus® Prime Pro Edition software. The Quartus® Prime Standard Edition software still uses Enable Intel FPGA Debug Master Endpoint.