2.3.1. Boundary-Scan Cells in Intel® MAX® 10 I/O Pin
The Intel® MAX® 10 3-bit BSC contains the following registers:
- Capture registers—connect to internal device data through OUTJ, OEJ, and PIN_IN signals.
- Update registers—connect to external data through PIN_OUT and PIN_OE signals.
Figure 2. User I/O BSC with JTAG BST Circuitry for Intel® MAX® 10 Devices
The TAP controller generates the global control signals internally for the JTAG BST registers, shift, clock, and update. The instruction register generates the MODE signal.
The data signal path for the boundary-scan register runs from the serial data in (SDI) signal to the serial data out (SDO) signal. The scan register begins at the TDI pin and ends at the TDO pin of the device.
| Pin Type | Captures | Drives | ||||
|---|---|---|---|---|---|---|
| Output Capture Register | OE Capture Register | Input Capture Register | Output Update Register | OE Update Register | Input Update Register | |
| User I/O | OUTJ | OEJ | PIN_IN | PIN_OUT | PIN_OE | INJ |
Note: All VCC and GND pin types do not have BSCs.